1
BB0:
	s_movk_i32 s3, 0x8000                                       ; b0038000
	s_load_b128 s[0:3], s[2:3], 0x0                             ; f4004001 f8000000
	v_mbcnt_lo_u32_b32 v0, -1, 0                                ; d71f0000 000100c1
	s_delay_alu instid0(VALU_DEP_1)                             ; bf870001
	v_lshlrev_b32_e32 v0, 2, v0                                 ; 30000082
	s_wait_kmcnt 0x0                                            ; bfc70000
	buffer_load_b32 v1, v0, s[0:3], null offen                  ; c405007c 40800001 00000000
	s_mov_b32 s4, 0xfedcba98                                    ; be8400ff fedcba98
	s_wait_loadcnt 0x0                                          ; bfc00000
	v_cmp_lt_u32 vcc_lo, v1, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0cb101
	s_xnor_b32 vcc_lo, 0x66666666, vcc_lo                       ; 906a6aff 66666666
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; bf870099
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0cb101
	v_cmp_lt_u32 vcc_lo, v1, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0c4e01
	s_xnor_b32 vcc_lo, 0x3c3c3c3c, vcc_lo                       ; 906a6aff 3c3c3c3c
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0c4e01
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; bf8700c1
	v_cmp_lt_u32 vcc_lo, v1, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0cb101
	s_xnor_b32 vcc_lo, 0x5a5a5a5a, vcc_lo                       ; 906a6aff 5a5a5a5a
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0cb101
	v_cmp_lt_u32 vcc_lo, v1, v1 row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0d6401
	s_xnor_b32 vcc_lo, 0xff00ff0, vcc_lo                        ; 906a6aff 0ff00ff0
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0d6401
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; bf8700c1
	v_cmp_lt_u32 vcc_lo, v1, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0c4e01
	s_xnor_b32 vcc_lo, 0x33cc33cc, vcc_lo                       ; 906a6aff 33cc33cc
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0c4e01
	v_cmp_lt_u32 vcc_lo, v1, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0cb101
	s_xnor_b32 vcc_lo, 0x55aa55aa, vcc_lo                       ; 906a6aff 55aa55aa
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0cb101
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; bf8700c1
	v_cmp_lt_u32 vcc_lo, v1, v1 row_ror:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0d2801
	s_xnor_b32 vcc_lo, 0xffff00, vcc_lo                         ; 906a6aff 00ffff00
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo row_ror:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0d2801
	v_cmp_lt_u32 vcc_lo, v1, v1 row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0d6401
	s_xnor_b32 vcc_lo, 0xf0ff0f0, vcc_lo                        ; 906a6aff 0f0ff0f0
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0d6401
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; bf8700c1
	v_cmp_lt_u32 vcc_lo, v1, v1 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0c4e01
	s_xnor_b32 vcc_lo, 0x3333cccc, vcc_lo                       ; 906a6aff 3333cccc
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0c4e01
	v_cmp_lt_u32 vcc_lo, v1, v1 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9202fa ff0cb101
	s_xnor_b32 vcc_lo, 0x5555aaaa, vcc_lo                       ; 906a6aff 5555aaaa
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v1, v1, v1, vcc_lo quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020202fa ff0cb101
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) ; bf870091
	v_permlanex16_b32 v2, v1, 0x76543210, s4 op_sel:[1,1]       ; d65c1802 0011ff01 76543210
	v_cmp_lt_u32_e32 vcc_lo, v2, v1                             ; 7c920302
	s_xnor_b32 vcc_lo, 0xffff0000, vcc_lo                       ; 906a6aff ffff0000
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_e32 v2, v2, v1, vcc_lo                        ; 02040302
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; bf8700c1
	v_cmp_lt_u32 vcc_lo, v2, v2 row_ror:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9204fa ff0d2802
	s_xnor_b32 vcc_lo, 0xff00ff00, vcc_lo                       ; 906a6aff ff00ff00
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v2, v2, v2, vcc_lo row_ror:8 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020404fa ff0d2802
	v_cmp_lt_u32 vcc_lo, v2, v2 row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9204fa ff0d6402
	s_xnor_b32 vcc_lo, 0xf0f0f0f0, vcc_lo                       ; 906a6aff f0f0f0f0
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v2, v2, v2, vcc_lo row_xmask:4 row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020404fa ff0d6402
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) ; bf8700c1
	v_cmp_lt_u32 vcc_lo, v2, v2 quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9204fa ff0c4e02
	s_xnor_b32 vcc_lo, 0xcccccccc, vcc_lo                       ; 906a6aff cccccccc
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v2, v2, v2, vcc_lo quad_perm:[2,3,0,1] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020404fa ff0c4e02
	v_cmp_lt_u32 vcc_lo, v2, v2 quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 7c9204fa ff0cb102
	s_xnor_b32 vcc_lo, 0xaaaaaaaa, vcc_lo                       ; 906a6aff aaaaaaaa
	s_wait_alu 0xfffe                                           ; bf88fffe
	v_cndmask_b32_dpp v2, v2, v2, vcc_lo quad_perm:[1,0,3,2] row_mask:0xf bank_mask:0xf bound_ctrl:1 fi:1 ; 020404fa ff0cb102
	buffer_store_b32 v2, v0, s[0:3], null offen                 ; c406807c 40800002 00000000
	s_endpgm                                                    ; bfb00000

For immediate assistance, please email our customer support: [email protected]

Download RAW File